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19-0857; Rev 0; 7/07
Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux
General Description
The MAX9729 stereo DirectDriveTM headphone amplifier features bass boost, volume control, an input mux, and an I2C/SMBusTM-compatible serial interface. This makes the MAX9729 ideal for portable audio applications where space is at a premium and performance is essential. The MAX9729 operates from a single 1.8V to 3.6V, and uses Maxim's patented DirectDrive architecture, eliminating the need for large DC-blocking capacitors. The headphone amplifiers deliver 52mW into a 32 load, feature low 0.03% THD+N, and high 90dB PSRR. Maxim's industry-leading click-and-pop suppression circuitry reduces audible transients during power and shutdown cycles. The BassMax feature boosts the bass response of the amplifier, improving audio reproduction for low-end headphones. The integrated volume control features 32 discrete volume levels along with a ramping function to ensure smooth transitions during shutdown cycles and input selection. The MAX9729's eight programmable maximum gain settings allow for a wide range of input signal levels. A 3:1 multiplexer/mixer allows the selection and summation of multiple stereo input signal sources. The MAX9729 also includes a dedicated BEEP input with independent attenuation control. BassMax, volume control, gain settings, and input selection are controlled using the I2C/SMBus-compatible serial interface. A lowpower, 5A shutdown mode is controlled through an external logic input or the serial interface. The MAX9729 consumes only 4.8mA of supply current, provides short-circuit and thermal-overload protection, and is specified over the -40C to +85C extended temperature range. The MAX9729 is available in a spacesaving 28-pin thin QFN package (5mm x 5mm x 0.8mm).
Pin Configuration appears at end of data sheet.
Features
DirectDrive Headphone Amplifier Eliminates Bulky DC-Blocking Capacitors 3:1 Input Multiplexer with Digital-Fade Circuitry Software-Enabled Bass Boost 32-Step Integrated Volume Control Beep Input with Programmable Output Level Low Quiescent Current Industry-Leading Click-and-Pop Suppression I2C-Compatible 2-Wire Interface Short-Circuit Protection 1.8V to 3.6V Single-Supply Operation Available in Space-Saving, Thermally Efficient 28-Pin TQFN-EP (5mm x 5mm x 0.8mm)
MAX9729
Applications
Portable CD/DVD/MD Players Cell Phones MP3/PMP Players Automotive Rear Seat Entertainment (RSE) Flat-Panel TVs
Ordering Information
PART MAX9729ETI+ PINPACKAGE 28 TQFN-EP** SLAVE ADDRESS* 101000_ PKG CODE T2855-5
Note: This device is specified over the -40C to +85C operating temperature range. +Denotes lead-free package. *Last digit of slave address is pin programmable. **EP = Exposed pad. SMBus is a trademark of Intel Corp. U.S. Patent # 7,061,327
Simplified Block Diagram
1.8V TO 3.6V
BML SCL SDA INL1 INL2 INL3 INR1 INR2 INR3 BEEP MIXER MUX FADER CONTROL PGA VOLUME CONTROL I2C INTERFACE
BassMax
MAX9729
OUTL
PGA
OUTR
BMR BassMax
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux MAX9729
ABSOLUTE MAXIMUM RATINGS
VDD, PVDD to PGND or SGND .................................-0.3V to +4V VDD to PVDD ................................................Internally Connected PVSS to SVSS .......................................................................0.3V SGND to PGND...................................................................0.3V C1P to PGND..............................................-0.3V to (VDD + 0.3V) C1N to PGND............................................(PVSS - 0.3V) to +0.3V PVSS, SVSS to PGND ................................................+0.3V to -4V INL_, INR_, BEEP to SGND............(SVSS - 0.3V) to (VDD + 0.3V) SDA, SCL, BEEP_EN to PGND.................................-0.3V to +4V SHDN to PGND ..........................................-0.3V to (VDD + 0.3V) OUT_ to PGND ............................................................-3V to +3V BM_ to SGND ..............................................................-2V to +2V Duration of OUT_ Short Circuit to PGND....................Continuous Continuous Current Into/Out of: VDD, C1P, C1N, PGND, PVSS, SVSS, or OUT_ .............0.85A All other pins.................................................................20mA Continuous Power Dissipation (TA = +70C, multilayer board) 28-Pin Thin QFN (derate 28.6mW/C above +70C) 0.2286mW Junction-to-Ambient Thermal Resistance (JA) 28-Pin TQFN.................................................................35C/W Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C OUT_ ESD Protection (Human Body Model) .......................8kV ESD Protection of All Other Pins ..........................................2kV Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS (3V Supply)
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1F, BM_ = 0V, maximum gain setting = 6dB, volume attenuation setting = -16dB (overall gain = -10dB), BassMax disabled. Load connected between OUT_ and PGND where specified. THD+N measurement BW = 22Hz to 22kHz. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) (Note 1)
PARAMETER GENERAL Supply Voltage Range Charge-Pump and Logic Supply Voltage Quiescent Supply Current Shutdown Supply Current Turn-On Time Beep Enable Time Thermal Shutdown Threshold Thermal Shutdown Hysteresis HEADPHONE AMPLIFIER Input Resistance Output Offset Voltage BMR, BML Input Bias Current RIN VOSHP IBIAS_BM Applicable to all maximum gain and volume settings Measured between OUT_ and SGND, overall gain = -10dB (Note 3) 14 25 0.7 10 35 3.5 100 k mV nA VDD PVDD IDD IDD_SHDN tON tON_BEEP TTHRES THYST (Note 2) (Note 2) No load, BEEP_EN = VDD (Note 3) VSHDN = 0V From shutdown mode to full operation 1.8 1.8 5.5 5 200 12 146 13 3.6 3.6 8 10 V V mA A s s C C SYMBOL CONDITIONS MIN TYP MAX UNITS
2
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Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux
ELECTRICAL CHARACTERISTICS (3V Supply) (continued)
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1F, BM_ = 0V, maximum gain setting = 6dB, volume attenuation setting = -16dB (overall gain = -10dB), BassMax disabled. Load connected between OUT_ and PGND where specified. THD+N measurement BW = 22Hz to 22kHz. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) (Note 1)
PARAMETER SYMBOL CONDITIONS VDD = 1.8V to 3.6V, overall gain = 6dB Power-Supply Rejection Ratio f = 217Hz, 100mVP-P ripple, overall gain = 26dB PSRR (Note 3) f = 1kHz, 100mVP-P ripple, overall gain = 26dB f = 20kHz, 100mVP-P ripple, overall gain = 26dB THD+N = 1%, fIN = 1kHz, overall gain = 1.8dB, TA = +25C (Note 4) fIN = 1kHz, overall gain = 3.5dB (Note 4) RL = 16 RL = 32 RL = 16, POUT = 42mW RL = 32, POUT = 40mW 12 21 MIN 72 TYP 95 90 dB 82 58 49 mW 52 0.04 % 0.04 3.5 6 8 10 19.5 22 24 26 10 20 30 40 50 52 54 56 99 101 0.5 No sustained oscillations VSHDN = 0V, measured from OUT_ to ROUT_SHDN SGND 200 20 dB V/s pF k dB dB MAX UNITS
MAX9729
Output Power
POUT
Total Harmonic Distortion Plus Noise
THD+N
Register 0x01, B[2:0] = 000 Register 0x01, B[2:0] = 001 Register 0x01, B[2:0] = 010 Maximum Gain AVMAX Register 0x01, B[2:0] = 011 Register 0x01, B[2:0] = 100 Register 0x01, B[2:0] = 101 Register 0x01, B[2:0] = 110 Register 0x01, B[2:0] = 111 Register 0x01, B[7:5] = 000 Register 0x01, B[7:5] = 001 Register 0x01, B[7:5] = 010 Beep Input Attenuation AV_BEEP Register 0x01, B[7:5] = 011 Register 0x01, B[7:5] = 100 Register 0x01, B[7:5] = 101 Register 0x01, B[7:5] = 110 Register 0x01, B[7:5] = 111 Signal-to-Noise Ratio Slew Rate Capacitive Drive Output Resistance in Shutdown SNR SR RL = 32, VOUT = 1VRMS BW = 22Hz to 22kHz BW = 22Hz to 22kHz and A-weighted
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3
Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux MAX9729
ELECTRICAL CHARACTERISTICS (3V Supply) (continued)
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1F, BM_ = 0V, maximum gain setting = 6dB, volume attenuation setting = -16dB (overall gain = -10dB), BassMax disabled. Load connected between OUT_ and PGND where specified. THD+N measurement BW = 22Hz to 22kHz. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) (Note 1)
PARAMETER SYMBOL CONDITIONS Peak voltage, Aweighted, 32 samples per second (Notes 3 and 5) Into shutdown Out of shutdown 505 L to R, or R to L, f = 10kHz, VOUT = 1VRMS, RL = 32, both channels loaded VIH VIL -1 VOL IOH IOL = 3mA VSDA = VDD 1.4 0.4 +1 0.4 1 MIN TYP 81 dBV 80 600 78 730 kHz dB MAX UNITS
Click-and-Pop Level
KCP
Charge-Pump Switching Frequency Crosstalk
fCP
DIGITAL INPUTS (SHDN, SDA, SCL, BEEP_EN) Input High Voltage Input Low Voltage Input Leakage Current DIGITAL OUTPUTS (SDA) Output Low Voltage Output High Current V A V V A
ELECTRICAL CHARACTERISTICS (2.4V Supply)
(VDD = PVDD = SHDN = 2.4V, PGND = SGND = 0V, C1 = C2 = C3 = 1F, BM_ = 0V, maximum gain setting = 6dB, volume attenuation setting = -16dB (overall gain = -10dB), BassMax disabled. Load connected between OUT_ and PGND where specified. THD+N measurement BW = 22Hz to 22kHz. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) (Note 1)
PARAMETER Quiescent Current Shutdown Current SYMBOL IDD ISHDN VSHDN = 0V THD+N = 1%, fIN = 1kHz, overall gain = 3.5dB, TA = +25C (Note 4) fIN = 1kHz, overall gain = 3.5dB (Note 4) RL = 16 CONDITIONS No load (Note 3) MIN TYP 4.5 4 32 mW RL = 32 RL = 16, POUT = 23mW RL = 32, POUT = 23mW f = 217Hz Power-Supply Rejection Ratio PSRR 100mVP-P ripple (Note 3) f = 1kHz f = 10kHz 32 0.03 % 0.03 90 85 61 dB MAX UNITS mA A
Output Power
POUT
Total Harmonic Distortion Plus Noise
THD+N
4
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Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux
ELECTRICAL CHARACTERISTICS (2.4V Supply) (continued)
(VDD = PVDD = SHDN = 2.4V, PGND = SGND = 0V, C1 = C2 = C3 = 1F, BM_ = 0V, maximum gain setting = 6dB, volume attenuation setting = -16dB (overall gain = -10dB), BassMax disabled. Load connected between OUT_ and PGND where specified. THD+N measurement BW = 22Hz to 22kHz. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) (Note 1)
PARAMETER SYMBOL CONDITIONS RL = 32, VOUT = 1VRMS, overall gain = 3.5dB Peak voltage, A-weighted, 32 samples per second (Notes 3 and 5) BW = 22Hz to 22kHz BW = 22Hz to 22kHz and A-weighted Into shutdown MIN TYP 98 dB 101 79 dBV Out of shutdown 79 MAX UNITS
MAX9729
Signal-to-Noise Ratio
SNR
Click-and-Pop Level
KCP
TIMING CHARACTERISTICS
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1F, BM_ = 0V, maximum gain setting = 6dB, volume setting = -16dB (overall gain = -10dB), BassMax disabled. Load connected between OUT_ and PGND where specified. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) (Notes 1 and 6)
PARAMETER Serial Clock Frequency Bus Free Time Between a STOP and a START Condition Hold Time Repeated for a START Condition Low Period of the SCL Clock High Period of the SCL Clock Setup Time for a Repeated START Condition Data Hold Time Data Setup Time Rise Time of Both SDA and SCL Signals Fall Time of Both SDA and SCL Signals Setup Time for STOP Condition Pulse Width of Suppressed Spike Capacitive Load for Each Bus Line SYMBOL fSCL tBUF tHD:STA tLOW tHIGH tSU:STA tHD:DAT tSU:DAT tr tf tSU:STO tSP CL_BUS 0.6 50 400 CONDITIONS MIN 0 1.3 0.6 1.3 0.6 0.6 0 100 300 300 0.9 TYP MAX 400 UNITS kHz s s s s s s ns ns ns s ns pF
Note 1: Note 2: Note 3: Note 4: Note 5:
All specifications are 100% tested at TA = +25C. Temperature limits are guaranteed by design. VDD and PVDD must be connected together. Inputs AC-coupled to SGND. Both channels loaded and driven in phase. Headphone testing performed with a 32 resistive load connected to PGND. Mode transitions are controlled by SHDN. KCP level is calculated as 20log[(peak voltage during mode transition, no input signal)/1VRMS]. Units are expressed in dBV. Note 6: Guaranteed by design.
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5
Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux MAX9729
Typical Operating Characteristics
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1F, CIN = 1F (1206 case size, X7R dielectric ceramic capacitor), BM_ = 0V, maximum gain setting = 3.5dB, volume attenuation setting = 0dB (total voltage gain = 3.5dB), BassMax disabled. Load connected between OUT_ and PGND where specified. THD+N measurement BW = 22Hz to 22kHz. Both channels loaded and driven in phase. TA = +25C, unless otherwise noted.)
TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER
MAX9729 toc01
TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER
MAX9729 toc02
TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER
VDD = 2.4V RL = 16 10 THD+N (%)
MAX9729 toc03
100 VDD = 3V RL = 16 10 THD+N (%)
100 VDD = 3V RL = 32 10 THD+N (%)
100
1 fIN = 5kHz fIN = 1kHz 0.1
1 fIN = 5kHz 0.1 fIN = 1kHz
1 fIN = 5kHz fIN = 1kHz 0.1
0.01 0 10 20
fIN = 100Hz 30 40 50 60 70 80
0.01 0 10
fIN = 100Hz 20 30 40 50 60 70 80
0.01 0 5
fIN = 100Hz 10 15 20 25 30 35 40 45 50 OUTPUT POWER PER CHANNEL (mW)
OUTPUT POWER PER CHANNEL (mW)
OUTPUT POWER PER CHANNEL (mW)
TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER
MAX9729 toc04
TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY
MAX9729 toc05
TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY
VDD = 3V RL = 32 POUT = 40mW
MAX9729 toc06
100
1
VDD = 2.4V RL = 32
VDD = 3V RL = 16 POUT = 42mW
1
10 0.1 THD+N (%) 1 fIN = 5kHz 0.1 fIN = 1kHz THD+N (%)
0.1 THD+N (%)
0.01
POUT = 9mW
0.01
POUT = 5mW
fIN = 100Hz 0.01 0 5 10 15 20 25 30 35 40 45 50 OUTPUT POWER PER CHANNEL (mW)
0.001 10 100 1k FREQUENCY (Hz) 10k 100k
0.001 10 100 1k FREQUENCY (Hz) 10k 100k
TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY
MAX9729 toc07
TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY
VDD = 2.4V RL = 32
MAX9729 toc08
POWER DISSIPATION vs. OUTPUT POWER
VDD = 3V fIN = 1kHz POUT = POUTL + POUTR RL = 16 200 150 100 50 RL = 32
MAX9729 toc09
1
1
350 300 POWER DISSIPATION (mW) 250
VDD = 2.4V RL = 16
0.1 THD+N (%)
POUT = 23mW THD+N (%)
0.1
POUT = 23mW
0.01
POUT = 8mW
0.01
POUT = 3mW
0.001 10 100 1k FREQUENCY (Hz) 10k 100k
0.001 10 100 1k FREQUENCY (Hz) 10k 100k
0 0 20 40 60 80 100 120 140 160 180 OUTPUT POWER (mW)
6
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Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux
Typical Operating Characteristics (continued)
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1F, CIN = 1F (1206 case size, X7R dielectric ceramic capacitor), BM_ = 0V, maximum gain setting = 3.5dB, volume attenuation setting = 0dB (total voltage gain = 3.5dB), BassMax disabled. Load connected between OUT_ and PGND where specified. THD+N measurement BW = 22Hz to 22kHz. Both channels loaded and driven in phase. TA = +25C, unless otherwise noted.)
POWER DISSIPATION vs. OUTPUT POWER
VDD = 2.4V fIN = 1kHz POUT = POUTL + POUTR
MAX9729 toc10
MAX9729
OUTPUT POWER vs. LOAD RESISTANCE
MAX9729 toc11
OUTPUT POWER vs. LOAD RESISTANCE
45 40 35 30 25 20 15 10 5 0 10 THD+N = 1% 100 LOAD RESISTANCE () 1000 THD+N = 10% VDD = 2.4V fIN = 1kHz
MAX9729 toc12 MAX9729 toc18 MAX9729 toc15
250
90 OUTPUT POWER PER CHANNEL (mW) 80 70 60 50 40 30 20 10 0 10 THD+N = 1% 100 LOAD RESISTANCE () THD+N = 10% VDD = 3V fIN = 1kHz
50 OUTPUT POWER PER CHANNEL (mW)
POWER DISSIPATION (mW)
200
150
RL = 16
100 RL = 32
50
0 0 20 40 60 80 100 120 OUTPUT POWER (mW)
1000
OUTPUT POWER vs. SUPPLY VOLTAGE
MAX9729 toc13
OUTPUT POWER vs. SUPPLY VOLTAGE
MAX9729 toc14
POWER-SUPPLY REJECTION RATIO vs. FREQUENCY
0 -20 -40 PSRR (dB) VDD = 3V SUPPLY RIPPLE 100mVP-P RL = 32
120 OUTPUT POWER PER CHANNEL (mW) 100 80 60 40 20 0
OUTPUT POWER PER CHANNEL (mW)
fIN = 1kHz RL = 16
120 100 80
fIN = 1kHz RL = 32
THD+N = 10%
THD+N = 10% 60 40 20 0 THD+N = 1%
-60 -80 -100 -120
HPR
THD+N = 1%
HPL
1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 SUPPLY VOLTAGE (V)
1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 SUPPLY VOLTAGE (V)
10
100
1k FREQUENCY (Hz)
10k
100k
POWER-SUPPLY REJECTION RATIO vs. FREQUENCY
MAX9729 toc16
CROSSTALK vs. FREQUENCY
MAX9729 toc17
CROSSTALK vs. FREQUENCY
0 -20 CROSSTALK (dB) -40 -60 -80 -100 R TO L -120 GAIN = 19.5dB VOUT = 1VP-P RL = 32
0 -20 -40 PSRR (dB) -60 -80 -100 -120 10
VDD = 2.4V SUPPLY RIPPLE 100mVP-P RL = 32
0 -20 CROSSTALK (dB) -40 -60 -80 -100 -120
GAIN = 3.5dB VOUT = 1VP-P RL = 32
HPR
R TO L
L TO R
HPL
L TO R
100
1k FREQUENCY (Hz)
10k
100k
10
100
1k FREQUENCY (Hz)
10k
100k
10
100
1k FREQUENCY (Hz)
10k
100k
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7
Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux MAX9729
Typical Operating Characteristics (continued)
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1F, CIN = 1F (1206 case size, X7R dielectric ceramic capacitor), BM_ = 0V, maximum gain setting = 3.5dB, volume attenuation setting = 0dB (total voltage gain = 3.5dB), BassMax disabled. Load connected between OUT_ and PGND where specified. THD+N measurement BW = 22Hz to 22kHz. Both channels loaded and driven in phase. TA = +25C, unless otherwise noted.)
CROSSTALK vs. FREQUENCY
MAX9729 toc19
CROSSTALK vs. FREQUENCY
MAX9729 toc20
BASS BOOST FREQUENCY RESPONSE
R2 = 36k C4 = 0.068F R2 = 22k C6 = 0.1F R2 = 10k C6 = 0.22F NO LOAD R1 = 47k
MAX9729 toc21
0 -10 -20 CROSSTALK (dB) -30 -40 -50 -60 -70 -80 -90 -100 10
GAIN = 3.5dB VOUT = 1VP-P RL = 16
0 -20 CROSSTALK (dB) -40 -60 -80 -100 -120
GAIN = 19.5dB VOUT = 1VP-P RL = 16
20 15 10
L TO R
GAIN (dB)
L TO R
5 0
R TO L
R TO L
-5 -10
DISABLED
100
1k FREQUENCY (Hz)
10k
100k
10
100
1k FREQUENCY (Hz)
10k
100k
10
100
1k FREQUENCY (Hz)
10k
100k
OUTPUT SPECTRUM
MAX9729 toc22
OUTPUT POWER vs. CHARGE-PUMP CAPACITANCE AND LOAD RESISTANCE
MAX9729 toc23
OUTPUT POWER vs. CHARGE-PUMP CAPACITANCE AND LOAD RESISTANCE
C1 = C2 = 1F 35 OUTPUT POWER (mW) 30 25 20 15 10 5 0 C1 = C2 = 0.68F VDD = 2.4V fIN = 1kHz THD+N = 1%
MAX9729 toc24
0 -20 OUTPUT MAGNITUDE (dBV) -40 -60 -80 -100 -120 -140 -160 0
VDD = 3V fIN = 1kHz RL = 32
60 50 OUTPUT POWER (mW) 40 30 20 10 0
C1 = C2 = 1F
40
C1 = C2 = 0.68F
VDD = 3V fIN = 1kHz THD+N = 1% 0 10 20 30 40 50 60
2
4
6
8
10 12 14 16 18 20
0
10
20
30
40
50
60
FREQUENCY (kHz)
LOAD RESISTANCE ()
LOAD RESISTANCE ()
POWER-UP/POWER-DOWN WAVEFORM
MAX9729 toc25
EXITING SHUTDOWN
MAX9729 toc26
ENTERING SHUTDOWN
MAX9729 toc27
VDD 2V/div
VSHDN 2V/div
VSHDN 2V/div
VOUT_ 10mV/div
VOUT_ 2V/div
VOUT_ 2V/div
100ms/div
40s/div
40s/div
8
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Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux
Typical Operating Characteristics (continued)
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1F, CIN = 1F (1206 case size, X7R dielectric ceramic capacitor), BM_ = 0V, maximum gain setting = 3.5dB, volume attenuation setting = 0dB (total voltage gain = 3.5dB), BassMax disabled. Load connected between OUT_ and PGND where specified. THD+N measurement BW = 22Hz to 22kHz. Both channels loaded and driven in phase. TA = +25C, unless otherwise noted.)
FADER OPERATION
MAX9729 toc28
MAX9729
SUPPLY CURRENT vs. SUPPLY VOLTAGE
NO LOAD INPUTS AC-GROUNDED SUPPLY CURRENT (mA) 5
MAX9729 toc29
SHUTDOWN CURRENT vs. SUPPLY VOLTAGE
MAX9729 toc30
6
7 6 SUPPLY CURRENT (A) 5 4 3 2 1
200mV/div 200mV/div
4
100mV/div
3
2 20ms/div 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 SUPPLY VOLTAGE (V)
0 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 SUPPLY VOLTAGE (V)
Pin Description
PIN 1 2 3 4, 8, 15, 22 5 6 7 9 10 11 12 13 NAME INR2 INR3 SGND N.C. ADD PVSS SDA C1N PGND C1P SCL PVDD Right-Channel Input 2 Right-Channel Input 3 Signal Ground. Connect SGND to PGND at a single point on the PCB near the device. No Connection. Not internally connected. Slave Address Selection Input. Connect ADD to VDD to set the device slave address to 1010001 or to PGND to set the device slave address to 1010000. Charge-Pump Output. Connect to SVSS. Serial Data Input. Connect a pullup resistor greater than 500 from SDA to PVDD. Charge-Pump Flying Capacitor Negative Terminal. Connect a 1F capacitor between C1P and C1N. Power Ground. Connect PGND to SGND at a single point on the PCB near the device. Charge-Pump Flying Capacitor Positive Terminal. Connect a 1F capacitor between C1P and C1N. Serial Clock Input. Connect a pullup resistor greater than 500 from SCL to PVDD. Charge-Pump and Logic Power-Supply Input. Bypass PVDD to PGND with a 1F capacitor and connect to VDD. PVDD and VDD are internally connected and should each have a 1F bypass capacitor located as close to the device as possible. Headphone Amplifier Negative Power-Supply Input. Connect to PVSS and bypass with a 1F capacitor to PGND. FUNCTION
14
SVSS
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9
Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux MAX9729
Pin Description (continued)
PIN 16 17 18 19 NAME BMR OUTR OUTL BML FUNCTION Right BassMax Input. Connect an external passive network between OUTR and BMR to apply bass boost to the right-channel output. See the BassMax Gain-Setting Components section. Connect BMR to SGND if BassMax is not used. Right Headphone Output Left Headphone Output Left BassMax Input. Connect an external passive network between OUTL and BML to apply bass boost to the left-channel output. See the BassMax Gain-Setting Components section. Connect BML to SGND, if BassMax is not used. Beep Enable Input. Connect BEEP_EN to PVDD to enable the beep amplifier or to PGND to disable the beep amplifier. Active-Low Shutdown Input. Drive SHDN low to disable the MAX9729. Connect SHDN to VDD while B7 in command register 0x00 is equal to 1 for normal operation (see Command Registers section). Power-Supply Input. Bypass VDD to PGND with a 1F capacitor and connect to PVDD. VDD and PVDD are internally connected and should each have a 1F bypass capacitor located as to close to the device as possible. Beep Input Left-Channel Input 1 Left-Channel Input 2 Left-Channel Input 3 Right-Channel Input 1 Exposed Paddle. Connect EP to SVSS or leave unconnected.
20 21
BEEP_EN SHDN
23 24 25 26 27 28 EP
VDD BEEP INL1 INL2 INL3 INR1 EP
Detailed Description
The MAX9729 stereo headphone amplifier features Maxim's patented DirectDrive architecture, eliminating the large output-coupling capacitors required by conventional single-supply headphone amplifiers. The MAX9729 consists of two 52mW Class AB headphone amplifiers, 3:1 stereo input multiplexer/mixer, two adjustable gain preamplifiers, a dedicated beep amplifier with independent gain control, hardware/software shutdown control, inverting charge pump, integrated 32-level volume control, BassMax circuitry, comprehensive click-and-pop suppression circuitry, and an I2C/SMBus-compatible interface (see the Functional Diagram/Typical Operating Circuit). A negative power supply (PVSS) is created internally by inverting the positive supply (PVDD). Powering the amplifiers from VDD and PVSS increases the dynamic range of the amplifiers to almost twice that of other single-supply amplifiers, increasing the total available output power. An I2C/SMBus-compatible interface allows serial communication between the MAX9729 and a microcon-
troller. The MAX9729's slave address is programmed to one of two different values using the ADD input allowing two MAX9729 ICs to share the same bus (see Table 1). The internal command registers control the shutdown mode of the MAX9729, select/mix input signal sources, enable the BassMax circuitry, headphone and beep amplifier gains, and set the volume level (see Table 2). The MAX9729's BassMax circuitry improves audio reproduction by boosting the bass response of the amplifier, compensating for any low-frequency attenuation introduced by the headphone. External components set the MAX9729's overall gain allowing for custom gain settings (see the BassMax Gain-Setting Components section).
DirectDrive
Traditional single-supply headphone amplifiers have their outputs biased about a nominal DC voltage, typically half the supply, for maximum dynamic range. Large coupling capacitors are needed to block this DC bias from the headphone. Without these capacitors, a significant amount of DC current flows to the head-
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Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux
phone, resulting in unnecessary power dissipation and possible damage to both headphone and headphone amplifier. In addition to the cost and size disadvantages, the DC-blocking capacitors required by conventional headphone amplifiers limit low-frequency response and can distort the audio signal. Maxim's patented DirectDrive architecture uses a charge pump to create an internal negative supply voltage. This allows the MAX9729 headphone amplifier outputs to be biased about ground, almost doubling the dynamic range while operating from a single supply (see Figure 1). With no DC component, there is no need for the large DC-blocking capacitors. Instead of two large (up to 220F) tantalum capacitors, the MAX9729 charge pump requires only two small 1F ceramic capacitors, conserving board space, reducing cost, and improving the frequency response of the headphone amplifier. See the Output Power vs. Charge-Pump Capacitance and Load Resistance graph in the Typical Operating Characteristics for details of the possible capacitor sizes.
MAX9729
VOUT VDD
VDD / 2
VDD
GND CONVENTIONAL DRIVER BIASING SCHEME
VOUT +VDD
GND
2VDD
Charge Pump
The MAX9729 features a low-noise charge pump. The 610kHz switching frequency is well beyond the audio range, and does not interfere with the audio signals. This enables the MAX9729 to achieve an SNR of 99dB. The switch drivers feature a controlled switching speed that minimizes noise generated by turn-on and turn-off transients. Limiting the switching speed of the charge pump also minimizes di/dt noise caused by the parasitic bond wire and trace inductances.
-VDD DirectDrive BIASING SCHEME
Figure 1. Traditional Amplifier Output vs. MAX9729 DirectDrive Output
Click-and-Pop Suppression
In conventional single-supply headphone amplifiers, the output-coupling capacitor is a major contributor of audible clicks and pops. The amplifier charges the coupling capacitor to its output bias voltage at startup. During shutdown, the capacitor is discharged. The charging and discharging results in a DC shift across the capacitor, which appears as an audible transient at the headphone speaker. Since the MAX9729 headphone amplifier does not require output-coupling capacitors, no audible transients occur. Additionally, the MAX9729 features extensive click-andpop suppression that eliminates any audible transient sources internal to the device. The Power-Up/PowerDown Waveform in the Typical Operating Characteristics shows that there are minimal transients at the output upon startup or shutdown. In most applications, the preamplifier driving the MAX9729 has a DC bias of typically half the supply. The input-coupling capacitor is charged to the pream-
plifier's bias voltage through the MAX9729's input resistor (RIN) during startup. The resulting shift across the capacitor creates a voltage transient that must settle before the 50ms turn-on time has elapsed. Delay the rise of SHDN by at least 4 time constants (4 x RIN x CIN) relative to the start of the preamplifier to avoid clicks/pops caused by the input filter.
Shutdown
The MAX9729 features a 5A, low-power shutdown mode that reduces quiescent current consumption and extends battery life. Shutdown is controlled by the SHDN logic input or software interface. Driving the SHDN input low disables the drive amplifiers, bias circuitry, charge pump, and sets the headphone amplifier output resistance to 20k. Similarly, the MAX9729 enters shutdown when bit seven (B7) in the command register, 0x00, is set to 0 (see the Command Registers section). SHDN and B7 must be high to enable the MAX9729. The I2C/SMBus interface is active and the
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Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux
contents of the command register are not affected when in shutdown. This allows the master device to write to the MAX9729 while in shutdown. When a shutdown is activated, either hardware (SHDN pin) or software (I2C register), the volume is smoothly reduced, according to a constant slope ramp. Similarly, when a shutdown is deactivated, either hardware or software, the volume is smoothly increased, according to a constant slope ramp, until the volume programmed in the register file is reached.
MAX9729
amplifier. This is realized using positive feedback from OUT_ to BM_. Figure 2 shows the connections needed to implement BassMax.
Maximum Gain Control
The MAX9729 features eight different programmable maximum gain settings ranging from +3.5dB to +26dB (see Table 8). Bits [2:0] in command register 0x01 control the maximum gain setting (AV_MAX).
Volume Control
The MAX9729 includes a 32-level volume control that adjusts the total voltage gain of the headphone amplifier according to the values of bits [4:0] in the 0x00 command register. With BassMax disabled, the total voltage gain of the MAX9729 is equal to: A V _ TOTAL = A V _ MAX - ATTEN (dB) where AV_TOTAL is the total voltage gain in dB, AV_MAX is the maximum gain setting in dB, and ATTEN is the volume attenuation in dB. Tables 5a, 5b, 5c show all the possible volume attenuation settings and the resulting AV_TOTAL with BassMax disabled. Figure 8 shows the volume control transfer function. Mute attenuation is typically better than 100dB when driving a 32 load. To perform smooth-sounding volume changes, step through all intermediate volume settings at a rate of approximately 2ms per step when a volume change occurs.
BassMax (Bass Boost)
Typical headphones do not have a flat-frequency response. The small physical size of the diaphragm does not allow the headphone speaker to efficiently reproduce low frequencies. This physical limitation results in attenuated bass response. The MAX9729 includes a bass boost feature that compensates for the headphone's poor bass response by increasing the amplifier gain at low frequencies. The DirectDrive output of the MAX9729 has more headroom than typical single-supply headphone amplifiers. This additional headroom allows boosting the bass frequencies without the output signal clipping. Program the BassMax gain and cutoff frequency with external components connected between OUT_ and BM_ (see the BassMax Gain-Setting Components section and the Functional Diagram/Typical Operating Circuit). Use the I2C-compatible interface to program the command register to enable/disable the BassMax circuit. BM_ is connected to the noninverting input of the output amplifier when BassMax is enabled. BM_ is pulled to SGND when BassMax is disabled. The typical application of the BassMax circuit involves feeding a lowpass-filtered version of the output signal back to the
Automatic Volume Ramping During Mode Transitions and Input Source Selection
The MAX9729 implements an automatic volume rampup/ramp-down function when exiting/entering shutdown and when selecting different input signal paths with the internal 3:1 multiplexer. The automatic volume rampup/ramp-down function steps through each intermediate volume setting at a rate of 1.5ms per step allowing for smooth sounding volume transitions. When exiting/entering shutdown, the volume ramp-up/rampdown function is implemented regardless of whether the shutdown command is initiated by an I2C command or the SHDN input. When exiting shutdown, the volume is ramped up to the value stored in register 0x00 (see Table 2). When selecting a new input signal path with the multiplexer, the MAX9729 first ramps down the volume, selects the new input source, and then ramps the volume back up to the value stored in register 0x00. This prevents any audible clicks and pops due to abrupt changes in signal amplitude when selecting a different input signal source.
R FROM VOLUME ATTENUATOR STAGE R OUT_ R1 TO HEADPHONE SPEAKER
MAX9729
BassMax ENABLE
BM_ R2 C6
Figure 2. BassMax External Connections
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Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux
BEEP Input
The MAX9729 features a BEEP input with eight different attenuation settings (see Table 6). The BEEP input is useful for applications requiring the routing of a system alert signal to the stereo audio path. The attenuation value of the BEEP input is set by bits [7:5] in the 0x01 command register (see Tables 2 and 6). The attenuation settings of the BEEP input are independent of the volume settings stored in register 0x00 (see Table 2). The BEEP input is enabled when BEEP_EN is connected to V DD and disabled when driven low. When BEEP_EN is high, the selected INL_ and INR_ inputs are disconnected from the signal path and the BEEP input signal is routed to both headphone outputs after being attenuated by the value set by bits [7:5] in register 0x01. When BEEP_EN is low, the BEEP input is disconnected from the signal path and the selected INL_ and INR_ inputs are reconnected. a serial clock line (SCL). SDA and SCL facilitate bidirectional communication between the MAX9729 and the master at clock rates up to 400kHz. Figure 3 shows the 2-wire interface timing diagram. The MAX9729 is a transmit/receive slave-only device, relying upon a master device to generate the clock signal. The master device, typically a microcontroller, initiates data transfer on the bus and generates SCL to permit that transfer. A master device communicates to the MAX9729 by transmitting the slave address with the Read/Write (R/W) bit followed by the data word. Each transmit sequence is framed by a START (S) or REPEATED START (Sr) condition and a STOP (P) condition. Each word transmitted over the bus is 8 bits long and is always followed by an acknowledge or not acknowledge clock pulse. The MAX9729 SDA line operates as both an input and an open-drain output. A pullup resistor, greater than 500, is required on the SDA bus. The MAX9729 SCL line operates as an input only. A pullup resistor, greater than 500, is required on SCL unless the MAX9729 is operating in a single-master system where the master device has a push-pull SCL output. Series resistors in line with SDA and SCL are optional. Series resistors protect the digital inputs of the MAX9729 from highvoltage spikes on the bus lines, and minimize crosstalk and undershoot of the bus signals.
MAX9729
Input Multiplexer/Mixer
The MAX9729 includes a stereo 3:1 multiplexer/mixer, allowing selection and mixing of three different stereo input sources. Bits [6:5] in register 0x00 control the selection/mixing of the input signal sources (see Tables 2 and 4). When all three stereo inputs are selected (Bits [6:5] = 11), the stereo signals are summed (mixed) together and connected to the signal path. The MAX9729 implements the automatic volume ramping function when an input source change occurs to ensure smooth sounding transitions. Clipping may occur if three high level signals are summed. Reprogram the preamplifier maximum gain setting to compensate.
Serial Interface
The MAX9729 features an I2C/SMBus-compatible 2-wire serial interface consisting of a serial data line (SDA) and
Bit Transfer One data bit is transferred during each SCL cycle. The data on SDA must remain stable during the high period of the SCL pulse since changes in SDA while SCL is high are control signals (see the START and STOP Conditions section). SDA and SCL idle high when the I2C bus is not busy.
SDA tSU, DAT tLOW SCL tHD, STA tR START CONDITION tHIGH tF REPEATED START CONDITION STOP CONDITION START CONDITION tHD, DAT tSU, STA tBUF tHD, STA tSP tSU, STO
Figure 3. 2-Wire Serial-Interface Timing Diagram
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Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux MAX9729
S Sr P
START CONDITION SCL 1 2 CLOCK PULSE FOR ACKNOWLEDGMENT
SCL
8 NOT ACKNOWLEDGE
9
SDA
SDA ACKNOWLEDGE
Figure 4. START, STOP, and REPEATED START Conditions
Figure 5. Acknowledge
START and STOP Conditions SDA and SCL idle high when the bus is not in use. A master device initiates communication by issuing a START condition. A START condition is a high-to-low transition on SDA with SCL high. A STOP condition is a low-to-high transition on SDA while SCL is high (see Figure 4). A START condition from the master signals the beginning of a transmission to the MAX9729. The master terminates transmission, and frees the bus, by issuing a STOP condition. The bus remains active if a REPEATED START condition is generated instead of a STOP condition. Early STOP Conditions The MAX9729 recognizes a STOP condition at any point during data transmission except if the STOP condition occurs in the same high clock pulse as a START condition. At least one clock pulse must separate any START and STOP conditions. Slave Address The slave address of the MAX9729 is pin programmable using the ADD input to one of two different values (see Table 1). The slave address is defined as the 7 most significant bits (MSBs) of the serial data transmission. The first byte of information sent to the MAX9729 after the START condition must contain the slave address and R/W bit. R/W bit indicates whether the master is writing to or reading from the MAX9729 (R/W = 0 selects
the write condition, R/W = 1 selects the read condition). After receiving the proper address, the MAX9729 issues an ACK by pulling SDA low for one clock cycle.
Acknowledge The acknowledge bit (ACK) is the ninth bit attached to any byte transmitted over the serial interface (see Figure 5). ACK is always generated by the receiving device. The MAX9729 generates an ACK when receiving a slave address or data by pulling SDA low during the ninth clock period. The SDA line must remain stable and low during the high period of the ACK clock pulse. When transmitting data, the MAX9729 waits for the receiving device to generate an ACK. Monitoring ACK allows detection of unsuccessful data transfers. An unsuccessful data transfer occurs if a receiving device is busy or if a system fault has occurred. In the event of an unsuccessful data transfer, the bus master should reattempt communication at a later time. Write Data Format A write to the MAX9729 includes transmission of a START condition, the slave address with the R/W bit set to 0 (see Table 1), one or two command bytes to configure the command registers, and a STOP condition. Figure 6a illustrates the proper data transmission for writing to register 0x00 in a single frame. Figure 6b illustrates the proper data transmission for writing to both registers 0x00 and 0x01 in a single frame. As shown in Figures 6a and 6b, the MAX9729 communicates an ACK after each byte of information is received. The MAX9729 latches each command byte into the respective command registers after an ACK is communicated. The master device terminates the write data transmission by issuing a STOP condition. When writing to register 0x01, register 0x00 must be written to first in the same data frame as shown in Figure 6b. In other words, when updating register 0x01 both registers must be written to.
Table 1. MAX9729 Slave Address with R/W Bit
MAX9729 SLAVE ADDRESS ADD GND VDD A6 (MSB) 1 1 A5 0 0 A4 1 1 A3 0 0 A2 0 0 A1 0 0 A0 0 1 R/W 0 0
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Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux MAX9729
COMMAND BYTE IS STORED AFTER ACK FROM MAX9729 FROM MASTER DEVICE B7 B6 B5 B4 B3 B2 B1 B0
S
SLAVE ADDRESS
0
ACK
COMMAND BYTE FOR REGISTER 0x00
ACK
P
R/W START CONDITION
FROM MASTER DEVICE FROM MAX9729
STOP CONDITION
Figure 6a. Write Data Format for Writing to Register 0x00 Only
COMMAND BYTE IS STORED AFTER ACK FROM MAX9729 FROM MASTER DEVICE B7 B6 B5 B4 B3 B2 B1 B0 B7 B6 B5 B4 B3 B2 B1
COMMAND BYTE IS STORED AFTER ACK B0
S
SLAVE ADDRESS
0
A
COMMAND BYTE FOR REGISTER 0x00
ACK
COMMAND BYTE FOR REGISTER 0x01
ACK
P
R/W START CONDITION
FROM MASTER DEVICE FROM MAX9729
FROM MASTER DEVICE FROM MAX9729
STOP CONDITION
Figure 6b. Write Data Format for Writing to Registers 0x00 and 0x01
Read Data Format A read from the MAX9729 includes transmission of a START condition, the slave address with the R/W bit set to 1, one or two bytes of register data sent by the MAX9729, and a STOP condition. Once the MAX9729 acknowledges the receipt of the slave address and R/W bit, the data direction of the SDA line reverses and the MAX9729 writes the contents of the command register 0x00 and 0x01 to the bus in that order. Each byte sent by the MAX9729 should be acknowledged by the master device unless the byte is the last data byte of the transmission, in which case, the master device should communicate a not acknowledge (NACK). After the NACK is communicated, the master device terminates the read data transmission by issuing a STOP condition. Figure 7a illustrates the proper data transmission for reading the contents of register 0x00. Figure 7b illustrates the proper data transmission for reading the contents of both registers 0x00 and 0x01 in a single frame. Data sent by the MAX9729 is valid on the rising edge of SCL. When reading register 0x01, register 0x00 must be read first in the same data frame as shown in Figure 7b.
In other words, when reading register 0x01 both registers must be read.
Command Registers The MAX9729 utilizes two command registers to enable/disable shutdown, control the multiplexer/mixer, set the volume, set the BEEP input attenuation, enable/disable BassMax, and set the maximum gain. Table 2 describes the function of the bits contained in the command registers. Set B7 to 0 in register 0x00 to shut down the MAX9729. The MAX9729 exits shutdown when B7 is set to 1 provided SHDN is high. SHDN must be high and B7 must be set to 1 for the MAX9729 to operate normally (see Table 3). Bits [6:5] in register 0x00 control the input multiplexer/ mixer. Select the desired input path and enable mixing of all three stereo input sources with these bits (see Table 4). Adjust the MAX9729's volume with bits [4:0] in register 0x00. The volume is adjustable to one of 32 steps ranging from full mute to the maximum gain set by bits [B2:B0] in register 0x01. Tables 5a, 5b, 5c list all the possible volume settings and resulting total voltage
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Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux MAX9729
COMMAND BYTE IS STORED AFTER ACK FROM MAX9729 FROM MASTER DEVICE B7 B6 B5 B4 B3 B2 B1 B0
S
SLAVE ADDRESS
1
ACK
CONTENTS OF REGISTER 0x00
NACK
P
R/W START CONDITION
FROM MAX9729 FROM MASTER DEVICE
STOP CONDITION
Figure 7a. Read Data Format for Reading Register 0x00 Only
FROM MAX9729 FROM MASTER DEVICE
B7
B6
B5
B4
B3
B2
B1
B0
B7
B6
B5
B4
B3
B2
B1
B0
S
SLAVE ADDRESS
1
A
COMMAND BYTE FOR REGISTER 0x00
ACK
COMMAND BYTE FOR REGISTER 0x01
NACK
P
R/W START CONDITION
FROM MAX9729 FROM MASTER DEVICE
FROM MAX9729 FROM MASTER DEVICE
STOP CONDITION
Figure 7b. Read Data Format for Reading Registers 0x00 and 0x01
Table 2. MAX9729 Command Registers
REGISTER 0x00 B7 SHUTDOWN (see Table 3) B6 B5 B4 B3 B2 B1 B0 MUX/MIXER CONTROL (see Table 4) 1 VOLUME CONTROL (see Table 5) BassMax ENABLE (see Table 7)
0x01
BEEP INPUT ATTENUATION (see Table 6)
MAXIMUM GAIN CONTROL (see Table 8)
X = Don't Care.
Table 3. Shutdown Control (Register 0x00), SHDN = VDD
B7 0 1 MODE MAX9729 disabled MAX9729 enabled
gains for the MAX9729. Figure 8 shows the volume control transfer function for the MAX9729. Use bits [B7:B5] in register 0x01 to set the BEEP input attenuation. The BEEP input attenuation is adjustable to one of eight different values ranging from -10dB to -56dB (see Table 6).
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Set B3 in register 0x01 to 1 to enable BassMax (see Table 7). The output signal's low-frequency response will be boosted according to the external components connected between OUT_ and BM_. See the BassMax Gain-Setting Components section for details on choosing the external components. Use bits [2:0] in register 0x01 to set the maximum gain of the MAX9729 to one of eight different values ranging from +3.5dB to +26dB (see Table 8). The maximum gain setting in conjunction with the volume setting determines the overall voltage gain of the MAX9729 (see Tables 5a, 5b, 5c).
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Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux MAX9729
Table 4. Multiplexer/Mixer Control (Register 0x00)
B6 0 0 1 1 B5 0 1 0 1 OUTL INL1 x AV_TOTAL INL2 x AV_TOTAL INL3 x AV_TOTAL (INL1 + INL2 + INL3) x AV_TOTAL OUTR INR1 x AV_TOTAL INR2 x AV_TOTAL INR3 x AV_TOTAL (INR1 + INR2 + INR3) x AV_TOTAL
Power-On Reset The MAX9729 features internal power-on reset (POR) circuitry that initializes the device upon power-up. The contents of the MAX9729's command registers at power-on are shown in Table 9.
Applications Information
Power Dissipation and Heat Sinking
Linear power amplifiers can dissipate a significant amount of power under normal operating conditions. The maximum power dissipation for each package is given in the Absolute Maximum Ratings section under Continuous Power Dissipation or can be calculated by the following equation: PD(MAX) = TJ(MAX) - TA JA
Use the THD+N vs. Output Power graph in the Typical Operating Characteristics to identify the system's dynamic range. Find the output power that causes 1% THD+N for a given load. This point will indicate what output power causes the output to begin to clip. Use the following equation to determine the peak-to-peak output voltage that causes 1% THD+N for a given load: VOUT _(P-P) = 2 2(POUT _ 1% x RL ) where POUT_1% is the output power that causes 1% THD+N, RL is the load resistance, and VOUT_(P-P) is the peak-to-peak output voltage. Determine the total voltage gain (AV_TOTAL) necessary to attain this output voltage based on the maximum peak-to-peak input voltage (VIN_(P-P)): A V _ TOTAL = VOUT _(P-P) VIN _(P-P)
where TJ(MAX) is +150C, TA is the ambient temperature, and JA is the reciprocal of the derating factor in C/W as specified in the Absolute Maximum Ratings section. For example, JA for the thin QFN package is +35C/W. If the power dissipation exceeds the rated package dissipation, reduce VDD, increase load impedance, decrease the ambient temperature, or add heatsinking. Large output, supply, and ground traces decrease JA, allowing more heat to be transferred from the package to surrounding air.
The AV_TOTAL setting is determined by the maximum voltage gain setting, volume setting, and bass boost gain if BassMax is enabled (see the Maximum Gain Control, Volume Control, and BassMax Gain-Setting Components sections).
UVLO
The MAX9729 features an undervoltage lockout (UVLO) function that prevents the device from operating if the supply voltage is less than 1.65V. This feature ensures proper operation during brownout conditions and prevents deep battery discharge. Once the supply voltage exceeds the UVLO threshold, the MAX9729 charge pump is turned on, the amplifiers are powered (provided that SHDN is high), and the command registers are reset to their POR values (see Table 9).
Output Dynamic Range
Dynamic range is the difference between the noise floor of the system and the output level at 1% THD+N. It is essential that a system's dynamic range be known before setting the maximum output gain. Output clipping will occur if the output signal is greater than the dynamic range of the system. The DirectDrive architecture of the MAX9729 has increased dynamic range (for a given VDD) compared to other single-supply amplifiers. Due to the absolute maximum ratings of the MAX9729 and to limit power dissipation, the MAX9729 includes internal circuitry that limits the output voltage to approximately 2.5V.
Component Selection
Charge-Pump Capacitor Selection Use ceramic capacitors with a low ESR for optimum performance. For optimal performance over the extended temperature range, select capacitors with an X7R dielectric.
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Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux MAX9729
Table 5a. Volume Control (Register 0x00)
B4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 B3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 B2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 B1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 B0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 ATTEN FROM MAX GAIN SETTING (dB) -0 -1.7 -3.4 -4.8 -6.2 -7.6 -9 -10.4 -11.8 -13.2 -14.6 -16 -17.4 -18.8 -20.2 -21.6 -23.1 -24.4 -26 -27.1 -28.6 -30.1 -32.3 -35.1 -38.6 -42.1 -46.2 -50.7 -54.2 -60.2 -70 MUTE AV_TOTAL (dB) WITH AV_MAX = +3.5dB +3.5 +1.8 +0.1 -1.3 -2.7 -4.1 -5.5 -6.9 -8.3 -9.7 -11.1 -12.5 -13.9 -15.3 -16.7 -18.1 -19.6 -20.9 -22.5 -23.6 -25.1 -26.6 -28.8 -31.6 -35.1 -38.6 -42.7 -47.2 -50.7 -56.7 -66.5 MUTE WITH AV_MAX = +6dB +6 +4.3 +2.6 +1.2 -0.2 -1.6 -3 -4.4 -5.8 -7.2 -8.6 -10 -11.4 -12.8 -14.2 -15.6 -17.1 -18.4 -20 -21.1 -22.6 -24.1 -26.3 -29.1 -32.6 -36.1 -40.2 -44.7 -48.2 -54.2 -64 MUTE WITH AV_MAX = +8dB +8 +6.3 +4.6 +3.2 +1.8 +0.4 -1 -2.4 -3.8 -5.2 -6.6 -8 -9.4 -10.8 -12.2 -13.6 -15.1 -16.4 -18 -19.1 -20.6 -22.1 -24.3 -27.1 -30.6 -34.1 -38.2 -42.7 -46.2 -52.2 -62 MUTE
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Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux
Table 5b. Volume Control (Register 0x00)
B4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 B3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 B2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 B1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 B0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 ATTEN FROM MAX GAIN SETTING (dB) -0 -1.7 -3.4 -4.8 -6.2 -7.6 -9 -10.4 -11.8 -13.2 -14.6 -16 -17.4 -18.8 -20.2 -21.6 -23.1 -24.4 -26 -27.1 -28.6 -30.1 -32.3 -35.1 -38.6 -42.1 -46.2 -50.7 -54.2 -60.2 -70 MUTE AV_TOTAL (dB) WITH AV_MAX = +10dB +10 +8.3 +6.6 +5.2 +3.8 +2.4 +1 -0.4 -1.8 -3.2 -4.6 -6 -7.4 -8.8 -10.2 -11.6 -13.1 -14.4 -16 -17.1 -18.6 -20.1 -22.3 -25.1 -28.6 -32.1 -36.2 -40.7 -44.2 -50.2 -60 MUTE WITH AV_MAX = +19.5dB +19.5 +17.8 +16.1 +14.7 +13.3 +11.9 +10.5 +9.1 +7.7 +6.3 +4.9 +3.5 +2.1 +0.7 -0.7 -2.1 -3.6 -4.9 -6.5 -7.6 -9.1 -10.6 -12.8 -15.6 -19.1 -22.6 -26.7 -31.2 -34.7 -40.7 -50.5 MUTE WITH AV_MAX = +22dB +22 +20.3 +18.6 +17.2 +15.8 +14.4 +13 +11.6 +0.2 +8.8 +7.4 +6 +4.6 +3.2 +1.8 +0.4 -1.1 -2.4 -4 -5.1 -6.6 -8.1 -10.3 -13.1 -16.6 -20.1 -24.2 -28.7 -32.2 -38.2 -48 MUTE
MAX9729
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Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux MAX9729
Table 5c. Volume Control (Register 0x00)
B4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 B3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 B2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 B1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 B0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 ATTEN FROM MAX GAIN SETTING (dB -0 -1.7 -3.4 -4.8 -6.2 -7.6 -9 -10.4 -11.8 -13.2 -14.6 -16 -17.4 -18.8 -20.2 -21.6 -23.1 -24.4 -26 -27.1 -28.6 -30.1 -32.3 -35.1 -38.6 -42.1 -46.2 -50.7 -54.2 -60.2 -70 MUTE AV_TOTAL (dB) WITH AV_MAX = +24dB +24 +22.3 +20.6 +19.2 +17.8 +16.4 +15 +13.6 +12.2 +10.8 +9.4 +8 +6.6 +5.2 +3.8 +2.4 +0.9 -0.4 -2 -3.1 -4.6 -6.1 -8.3 -11.1 -14.6 -18.1 -22.2 -26.7 -30.2 -36.2 -46 MUTE WITH AV_MAX = +26dB +26 +24.3 +22.6 +21.2 +19.8 +18.4 +17 +15.6 +14.2 +12.8 +11.4 +10 +8.6 +7.2 +5.8 +4.4 +2.9 +1.6 +0 -1.1 -2.6 -4.1 -6.3 -9.1 -12.6 -16.1 -20.2 -24.7 -28.2 -34.2 -44 MUTE
20
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Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux
MAX9729 VOLUME CONTROL TRANSFER FUNCTION
0 10 20 ATTENUATION (dB) 30 40 50 60 70 80 90 100 0 5 10 15 20 25 30 35 CODE (DECIMAL)
Table 7. BassMax Control (Register 0x01)
B3 0 1 MODE BassMax Disabled BassMax Enabled
MAX9729
Table 8. Maximum Gain Control (Register 0x01)
B2 0 0 0 0 1 1 1 1 B1 0 0 1 1 0 0 1 1 B0 0 1 0 1 0 1 0 1 MAXIMUM GAIN (dB) 3.5 6 8 10 19.5 22 24 26
Figure 8. MAX9729 Volume Control Transfer Function
Table 6. Beep Level (Register 0x01)
B7 0 0 0 0 1 1 1 1 B6 0 0 1 1 0 0 1 1 B5 0 1 0 1 0 1 0 1 BEEP LEVEL (dBV) -10 -20 -30 -40 -50 -52 -54 -56
graph in the Typical Operating Characteristics. Place C1 physically close to C1P and C1N. Use a 1F capacitor for C1 in most applications.
BEEP level referenced to a 3V BEEP input.
Charge-Pump Flying Capacitor (C1) The charge-pump flying capacitor connected between C1N and C1P affects the charge pump's load regulation and output impedance. Choosing too small a flying capacitor degrades the MAX9729's ability to provide sufficient current drive and leads to a loss of output voltage. Increasing the value of the flying capacitor improves load regulation and reduces the chargepump output impedance. See the Output Power vs. Charge-Pump Capacitance and Load Resistance
Charge-Pump Hold Capacitor (C2) The hold capacitor's value and ESR directly affect the ripple at PVSS. Ripple is reduced by increasing the value of the hold capacitor. Choosing a capacitor with lower ESR reduces ripple and output impedance. Lower capacitance values can be used in systems with low maximum output power levels. See the Output Power vs. Charge-Pump Capacitance and Load Resistance graph in the Typical Operating Characteristics. C2 should be equal to the value of C1. Place C2 physically close to PVSS and SVSS. Connect PVSS and SVSS together at C2. Use a 1F capacitor for C2 in most applications. PVDD Bypass Capacitor (C3) The PVDD bypass capacitor lowers the output impedance of the power supply and reduces the impact of the MAX9729's charge-pump switching transients. C3 should be greater than or equal to C1. Place C3 physically close to PVDD.
Table 9. Initial Power-Up Command Register Status
REGISTER 0x00 0x01 B7 1 1 B6 0 1 B5 0 1 B4 0 1 B3 1 1 B2 0 0 B1 1 0 B0 1 1 POR SETTINGS Shutdown mode disabled (assuming VSHDN = VDD), INL1 and INR1 inputs selected, ATTEN = 16dB (AV_TOTAL = -10dB) Beep input attenuation = 56dB, BassMax enabled, AV_MAX = 6dB
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21
Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux MAX9729
Input-Coupling Capacitor The AC-coupling capacitor (CIN) and input resistor (RIN) form a highpass filter that removes any DC bias from an input signal. See the Functional Diagram/Typical Operating Circuit. CIN prevents any DC components from the input signal source from appearing at the amplifier outputs. The -3dB point of the highpass filter, assuming zero source impedance due to the input signal source, is given by:
f-3dB = 1 2 x RIN x CIN (Hz)
Table 10. BassMax Gain Examples, R1 = 47k
R2 (k) 39 33 27 22 15 10 AV_BOOST (dB) 20.6 15.1 11.3 8.8 5.7 3.7
Choose CIN such that f-3dB is well below the lowest frequency of interest. Setting f-3dB too high affects the amplifier's low-frequency response. Use capacitors with low-voltage coefficient dielectrics. Aluminum electrolytic, tantalum, or film dielectric capacitors are good choices for AC-coupling capacitors. Capacitors with high-voltage coefficients, such as ceramics (non-C0G dielectrics), can result in increased distortion at low zero frequencies. If a ceramic capacitor is selected due to board space or cost constraints, use the largest package possible to minimize voltage coefficient effects. In addition, use X7R dielectrics as opposed to X5R, Y5V, or Z5U.
BassMax Gain-Setting Components The bass boost, low-frequency response when BassMax is enabled, is set by the ratio of R1 to R2 (see Figure 2), by the following equation:
A V _ BOOST = 20 x log R1 + R2 (dB) R1 - R2
Choose a value for R1 that is greater than 40k to ensure that positive feedback is negligible when BassMax is disabled. Table 10 contains a list of R2 values, with R1 = 47k, and the corresponding low-frequency gain boost values. The low-frequency boost attained by the BassMax circuit is added to the gain realized by the maximum gain setting and volume setting. Select the BassMax gain so that the output signal will remain within the dynamic range of the MAX9729. Output signal clipping will occur at low frequencies if the BassMax gain boost is excessively large. See the Output Dynamic Range section. Capacitor C4 forms a pole and a zero according to the following equations: R1 - R2 (Hz) 2 x C6 x R1 x R2 R1 + R2 fZERO = (Hz) 2 x C6 x R1 x R2 fPOLE = fPOLE is the frequency at which the gain boost begins to roll off. fZERO is the frequency at which the bass boost gain no longer affects the transfer function. At frequencies greater than or equal to fZERO, the gain set by the maximum gain setting and the volume control attenuation dominate. Table 11 contains a list of capacitor values and the corresponding poles and zeros for a given DC gain. See Figure 9 for an example of a gain profile using BassMax.
where AV_BOOST is the gain boost, in dB, at low frequencies. AV_BOOST is added to the gain realized by the maximum gain setting and the volume setting. The total gain at low frequencies is equal to: A V _ TOTAL _ BM = A V _ MAX - ATTEN + A V _ BOOST (dB) where AV_TOTAL_BM is the total voltage gain at low frequencies in dB, AV_MAX is the maximum gain setting in dB, and ATTEN is the volume attenuation in dB. To maintain circuit stability, the ratio: R2 R1 + R2 must not exceed 1/2. A ratio equaling 1/3 is recommended. The switch that shorts BM_ to SGND, when BassMax is disabled, can have an on-resistance as high as 300.
22
Layout and Grounding
Proper layout and grounding are essential for optimum performance. Connect PGND and SGND together at a single point (star ground point) on the PCB near the MAX9729. Connect PV SS and SV SS together at C2. Place C2 physically close to PVSS and SVSS and connect it to PGND. Bypass PV DD to PGND with C3. Connect C3 as close to PVDD as possible. Bypass VDD to SGND with a 1F capacitor. Place the VDD bypass
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Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux
Table 11. BassMax Pole and Zero Examples for a Gain Boost of 8.8dB (R1 = 47k, R2 = 22k)
C6 (nF) 100 82 68 56 47 22 10 fPOLE (Hz) 38 47 56 68 81 174 384 fZERO (Hz) 106 130 156 190 230 490 1060
AV (dB)
MAX9729
GAIN PROFILE WITH AND WITHOUT BassMax
10 8 6 4 2 0 -2 -4 -6 -8 -10 1 10 100 FREQUENCY (Hz) 1k 10k WITHOUT BassMax MAX9729 CMD REGISTER CODE = 0xFF R1 = 47k R2 = 22k C3 = 0.1F WITH BassMax fPOLE fZERO
capacitor as close to VDD as possible. Route PGND and all traces that carry switching transients away from SGND and the audio signal path. Route digital signal traces away from the audio signal path. Make traces perpendicular to each other when routing digital signals over or under audio signals. The thin QFN package features an exposed paddle that improves thermal efficiency. Ensure that the exposed paddle is electrically isolated from PGND, SGND, and V DD. Connect the exposed paddle to SV SS when the board layout dictates that the exposed paddle cannot be left unconnected.
Figure 9. BassMax Gain Profile Example
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23
MAX9729
Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux
24
VDD TO I2C MASTER 1.8V TO 3.6V 10k 10k 23 7 SDA SCL VDD ADD 5 20 BEEP_EN R R 12 21
1F
CIN 1F
LEFT AUDIO INPUT 1
25 INL1 I2C INTERFACE/CONTROL LOGIC VDD VDD R OUTL SVSS SVSS SVSS 0 TO 100dB ATTENUATOR VDD VDD VDD BEEP ENABLE BassMax ENABLE BML BMR 19 16 C6 0.1F 18 VDD
25k
SHDN
CIN 1F
LEFT AUDIO INPUT 2
26 INL2
25k
CIN 1F
27 INL3
25k
LEFT AUDIO INPUT 3
R1 47k
CIN 1F
RIGHT AUDIO INPUT 1
28 INR1
25k
R2 22k R2 22k OUTR SVSS R R1 47k PVDD 13 VDD C3 1F C1P 11 17 C6 0.1F
CIN 1F
RIGHT AUDIO INPUT 2 SVSS 25k R VDD SVSS R
1 INR2
25k
CIN 1F
2 INR3
25k
RIGHT AUDIO INPUT 3
MAX9729
BEEP ENABLE SVSS BEEP 24 CIN 1F BEEP INPUT
R CHARGE PUMP C1N SGND 3 PGND 10 PVSS 6 C2 1F SVSS 14 9
C1 1F
BASS-BOOST CIRCUIT CONFIGURED FOR AV_BOOST = +8.8dB, fPOLE = 38Hz, fZERO = 106Hz. () USCP PACKAGE
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Functional Diagram/Typical Operating Circuit
SGND
PGND
Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux
System Diagram
MAX9729
10k
10k 1F 1.8V TO 3.6V C3 1F
CONTROLLER CIN 1F
SDA SCL SHDN BEEP_EN
VDD
PVDD
BEEP CIN 1F ADD
OUTL R1 47k
INL1 AUDIO CODEC CIN 1F INR1 CIN 1F INL2 BASEBAND IC CIN 1F INR2 CIN 1F INL3 FM RADIO IC CIN 1F INR3 C1P C1N SGND PGND PVSS
BML C4 0.1F R2 22k
MAX9729
C4 0.1F BMR R1 47k OUTR R2 22k
SVSS
C2 1F C1 1F
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25
Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux MAX9729
Pin Configuration
SHDN
TOP VIEW
BEEP_EN
OUTR
OUTL
BMR
16
BML
21 N.C. VDD BEEP INL1 INL2 INL3 INR1 22 23 24 25 26 27 28 + 1
20
19
18
17
15 14 13 12 SVSS PVDD SCL C1P PGND C1N N.C.
N.C.
11 10 9 8 7
MAX9729
2
3
4
5
6
INR2
SGND
INR3
N.C.
ADD
TQFN
PVSS
SDA
Chip Information
PROCESS: BiCMOS
26
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Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
MAX9729
PACKAGE OUTLINE, 16, 20, 28, 32, 40L THIN QFN, 5x5x0.8mm
21-0140
K
1
2
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QFN THIN.EPS
27
Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux MAX9729
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE, 16, 20, 28, 32, 40L THIN QFN, 5x5x0.8mm
21-0140
K
2
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
28 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2007 Maxim Integrated Products
SPRINGER
is a registered trademark of Maxim Integrated Products. Inc.

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